Threshold voltage and gate leakage are crucial parameters for assessing the performance of GaN HEMT devices with an enhanced Si-based p-GaN gate structure. The variation of thermal stress and electrical stress will facilitate the electron tunneling effect near the gate of the device， and facilitate the interaction between hot electrons and device defects to form an interface state， thereby resulting in the increase of gate leakage and threshold voltage drift. The long-term operation will cause the deterioration of gate characteristics and impede the large-scale engineering application of GaN power electronic devices. In this paper， an enhanced p-GaN GaN HEMT device was fabricated based on the 101.6 mm （4 inch） GaN device technology platform. The two-layer source field plate and source grounding hole structure were investigated， and the influence of this structure on the gate leakage and threshold voltage of the device was explored. The threshold voltage of the device at low temperature （-50℃） varies by 0.4 V compared with that at high temperature （155℃）. After a 200 V drain stress test， the threshold voltage of the device varies by 0.24 V， the threshold voltage shifts by 0.2 V when the drain voltage varies， and the variation is lower than that of device without this structure. Furthermore， when the gate voltage attains a value of 5 V， the gate leakage current of the fabricated 400 μm device amounts to 1.4 μA， and undergoes a variation of approximately 0.1 μA subsequent to the thermal stress and electrical stress tests. The test outcomes manifest that the developed enhanced p-GaN grid structure GaN HEMT is competent to operate securely in intricate environments.

Based on radio frequency device-level carbon nanotube array materials， carbon nanotube radio frequency field effect transistors （CNT RF FETs） with high gain and high linearity performances are developed in this paper. And by S⁃parameter extraction， equivalent circuit modeling and matching circuit design， a single-stage carbon nanotube RF amplifier circuit is realized. The amplifier shows a gain of 10.9 dB at 9 GHz and third-order intermodulation better than -35 dBc at the 1 dB gain compression point. This paper for the first time reports an X⁃band carbon nanotube RF amplifier circuit， and can provide technical reference for the further development of carbon nanotube RF electronics.

Terahertz metasurface sensing technology has significant advantages in the fields of biomedical detection and disease diagnosis， mainly due to the non ionizing nature of terahertz waves and the fingerprint spectral characteristics of biomolecules. This paper reviews the latest research on carbon-based terahertz metasurface sensors based on graphene and carbon nanotubes， focusing on the applications of these sensors in improving sensitivity， specific detection， and constructing broadband fingerprint spectra， including sensitivity enhancement in different local modes and specific detection of special modifications of functional materials. Specifically， graphene metasurface sensors utilize their high electron mobility and linear dispersion relationship to achieve sensitive responses in the terahertz band. Due to its high specific surface area and excellent electrical properties， carbon nanotube films provide more active sites and enhance the detection capability of the sensor. Through specific modifications， such as functionalized gold nanoparticles and biological probes， metasurface sensors can build highly selective interfaces， reduce background noise interference， and improve the recognition ability of target molecules. This review highlights the potential of carbon-based terahertz metasurface sensors to achieve high-sensitivity detection and multifunctional applications， while also pointing out the challenges faced by current technologies and directions for future development.

Millimeter wave/terahertz MEMS switch is a miniature movable device manufactured using semiconductor technology， which has the advantages of small size， low power consumption， and high integration. The article first explains the structure and working principle of MEMS switches， reviews the research progress of millimeter wave/terahertz MEMS switches based on fixed beam and cantilever beam in recent years， and points out that for low-power applications， cantilever beam switches are superior to other switch designs. Afterwards， the article analyzes the optimization scheme for important performance indicators of typical millimeter wave/terahertz MEMS switches. Finally， the article elaborates on the application of millimeter wave/terahertz MEMS switches in 6G mobile communication， and summarizes and prospects their future research trends and challenges.

Field‑effect transistors （FETs） constructed based on aligned carbon nanotube （ACNT） materials have emerged as strong candidates for high‑performance and low‑power FETs in the post‑Moore era， owing to their exceptional carrier mobility， potential for dimensional scaling， compatibility with complementary‑metal‑oxide‑semiconductor （CMOS） technology， and the feasibility of wafer‑scale fabrication. This paper reviews the fabrication processes of carbon nanotube FETs， analyzing and evaluating their advantages and limitations from the perspectives of material preparation， transistor architecture， contact engineering， and dielectric engineering. Current process challenges for carbon‑based FETs are summarized， and strategies suitable for ultra‑large‑scale integrated circuits are discussed. Finally， the future development of carbon nanotube transistor fabrication processes is envisioned.

Carbon is the element exhibiting very high content in nature， and its numerous allotropes have significantly contributed to the ongoing advancement of society and technology. Especially in the semiconductor field， diamond， graphene and carbon nanotubes， with their ultra-high carrier mobility and unique energy band structure， have great prospects for applications in high frequency， high power and even power electronics. This paper reviews the research progress of carbon-based materials （diamond， graphene and carbon nanotubes） in radio frequency （RF） electronic devices， including material preparation， characterization， RF electronic device processes and recent achievements. Finally， the current challenges of carbon-based materials in RF applications are discussed，along with the prospects for future development of carbon-based RF devices.

Terahertz （THz） metasurfaces exhibit remarkable light-field manipulation capabilities due to their ability to capture incident photons at sub-wavelength scales and generate strong confined field-enhancing effects at resonance frequencies. Photonic bound states in the continuum （BIC） are non-radiative eigenstates located in the radiative continuum， with two outstanding properties of infinitely high Q factor and momentum spatial polarization vortex， which bring new opportunities for customization of high-Q resonance and enhanced light field manipulation in terahertz metasurface. This paper reviews the historical development of optical BIC， summarizes the physical properties and formation mechanism of different types of BIC in periodic optical systems， and discusses the generation and evolution of BIC from topological perspectives. In addition， the review focuses on the emerging applications of BIC-driven metasurfaces in THz photonics， and concludes with a discussion of the challenges and prospects in this field.

The fabrication of traveling wave tube （TWT） slow-wave structures typically employs computer-numerically-controlled precision machinery. As the operating frequency increases， the requirement for the precision of the characteristic dimensions of the slow-wave structure reaches the micron to nanometer scale， which presents significant challenges in machining and involves long cycles and high costs， and thus limiting the rapid development of the technology. Silicon-based MEMS processing technology offers excellent three-dimensional morphological molding， high precision control and good batch-to-batch consistency. This paper addresses the design requirements for a dual-slot deep-folded waveguide slow-wave structure for THz TWT power source， and developed a three-dimensional integrated process manufacturing technology based on silicon substrate. A method combining photoresist masking with dielectric masking is employed， and the balance between the etching and passivation processes during deep reactive ion etching （DRIE） is carefully optimized. The process is then completed with electroplating gold and gold-gold bonding. Therefore， high-performance silicon-based terahertz slow-wave structures have been successfully manufactured at 150-mm wafer level with a working frequency of 0.65 THz and the insertion loss as low as 1.6 dB/mm， which helps establish technical foundations for technological breakthrough and application development of terahertz TWTs.

Based on terahertz monolithic integration technology， a 560 GHz subharmonic mixer was designed. The three-dimensional electromagnetic model of the diode was established for full-wave simulation. Combined with the SPICE parameter model of the diode， a complete diode model including parasitic parameters and intrinsic parameters was obtained. The circuit was simulated and optimized based on the half-subdivision and half-global design method， which is flexible and the size of the circuit is small. The whole circuit is designed on a 3 μm thick GaAs membrane， effectively suppresses the transmission of higher-order modes and reduces the transmission loss. The stress support is provided by laying a large area of beam⁃lead to ensure the stability of the circuit. The experimental results show that when the local oscillator drive power is 3 mW， the conversion loss of the mixer is less than 11 dB within 520-600 GHz.

Two GaN Schottky barrier diodes （SBDs） on SiC were fabricated with different doping concentration and thickness of low doped GaN epitaxial layer. The results show that the SBD prepared with epitaxial layer thickness of 80 nm and doping concentration of 8×10¹⁷ cm^-3，which has a cut-off frequency up to 1.2 THz. Based on this SBD， a balanced frequency tripler terahertz monolithic integrated circuit （TMIC） was fabricated. At room temperature， the output power of this frequency tripler reaches 10 mW to 25 mW in the range of 305 GHz to 330 GHz with max efficiency of 3.3% in continuous wave mode.

Fabrication of 35 nm enhancement-mode InP high electron mobility transistors on 101.6 mm InP wafer was achieved. By utilizing InAs composite channel structure， the product of the room temperature two dimensional electron gas mobility and sheet density reached 4.2×10/（V·s）. Using PtTiPtAu buried gate technology， the peak transconductance of the typical device reached 2 900 mS/mm， the cutoff frequency reached 460 GHz， the maximum oscillation frequency reached 720 GHz. Meanwhile， a 340 GHz low-noise amplifier was prepared， with a small signal gain of 22-27 dB and a noise figure below 8 dB were achieved within the frequency range of 310-350 GHz. The technology platforms of 340 GHz InP low-noise amplifier were established， which paved the way for the developments of terahertz low-noise monolithic microwave integrated circuit.

A dual-beam double folded transmit array antenna based on digital encoding was proposed in this paper. The antenna consisted of a main transmission surface， a secondary reflection surface， and a horn. The main transmission surface achieved full reflection of x-polarized waves and full transmission of y-polarized waves， while the secondary reflection surface converted the linearly polarized waves emitted by the feed into cross polarized reflection waves. By reasonable layout， the profile height of the antenna was reduced to 1/4 of that of traditional transmit arrays. In addition， the digital encoding method was adopted in this paper， which first discretized the array to M1. Then， two units with a phase interval of 180° were encoded into a dual beam modulation sequence M2 according to a specific gradient. Finally， the M1 and M2 sequences were superimposed to achieve dual beams. Physical production of the designed dual-beam double folded transmit array antenna is presented in the paper， and the measured and simulated results are in good agreement. Among them， the maximum radiation gain of a single beam reaches 24.6 dB， the aperture efficiency is 40.8%， and the dual beam shows the maximum radiation gain at ± 19.5°， which are 18.4 dB and 17.5 dB， respectively.

Terahertz phased array systems， serving as the cornerstone of future communication and radar technologies， hold immense potential in applications such as 6G communication， satellite communication， and ultra‑low‑latency systems. This paper provided an overview of the primary architectures of terahertz phased array systems， encompassing schemes like intermediate frequency （IF） phase shifting， local oscillator （LO） phase shifting， baseband phase shifting， and radio frequency （RF） phase shifting. It further analyzed their respective advantages， disadvantages， and technical challenges in diverse application scenarios. Special attention was paid to the research progress of terahertz phased array systems based on complementary metal oxide semiconductor （CMOS） technology and terahertz phased array transceivers， covering design breakthroughs from the W‑band to beyond 0.5 THz. These emerging technologies offer novel design perspectives for high‑frequency phased array systems and are poised to play a pivotal role in future ultra‑high‑speed communication and low‑latency applications.

With the development of fields such as artificial intelligence and big data， the demands for chip computing power and energy efficiency are increasing. Traditional silicon-based chip technology faces limitations such as power consumption walls， memory walls， and scaling challenges， necessitating new channel materials and chip architectures to propel the continued advancement of the information electronics industry. Carbon nanotubes （CNTs）， due to their excellent electrical， mechanical， and thermal properties， have emerged as ideal materials for constructing the next generation of integrated circuits. This article reviews the latest research progress in monolithic three-dimensional integrated circuits （M3D ICs） based on carbon nanotubes， including their fabrication processes， performance advantages， application scenarios， and challenges faced. Finally， several potential directions for future development are discussed.

To meet the demand for low loss power combiners in the development of terahertz solid‑state power amplifiers， a 4‑way radial waveguide power combiner was developed at 200‑240 GHz with gap waveguide technology. The passive tested return loss is better than -15 dB， with a passive combining efficiency of 88.7%， which shows the low‑loss characteristics of the gap waveguide at terahertz band. Based on the power amplifier module packaged with two GaN MMICs， further active power combining is carried out. A peak output power of 311 mW is achieved at 220 GHz， and the average power combining efficiency of 81% is got cross over the frequency band of 200‑240 GHz.

In recent years， the terahertz frequency band has garnered extensive attention as an alternative frequency band for the next-generation 6G communication technology， and terahertz has thus emerged as a research focus. Terahertz integrated circuits （chips） are crucial for facilitating the rapid development of various terahertz application systems. With the continuous enhancement of characteristic frequency and maximum oscillation frequency（f_T/f_max） of silicon-based processes， it becomes feasible to achieve fully integrated silicon-based terahertz transmitters in the terahertz frequency band using silicon-based processes. This article briefly reviews significant research advancements in terahertz transmitter chip technologies based on silicon-based processes， including 150 GHz direct up conversion transmitter chips， 220 GHz sliding intermediate-frequency superheterodyne transmitter chips， and D-band direct modulation transmitter chips. Experimental results have verified the advantages of the terahertz frequency band in high-speed communication applications. Silicon-based terahertz transceiver integrated circuits are expected to be the key technology for breaking through the requirements of high data rates in 6G systems.

Graphene has extremely high mobility and optoelectronic coupling efficiency， exhibiting optoelectronic properties far superior to silicon and other materials. In addition， graphene is free from lattice matching and can achieve perfect compatibility with many materials， which makes it an ideal material for optoelectronic applications. In this article， the advantages of graphene in optoelectronic integration technology are highlighted，the research progress of graphene in photodetectors and electro-optic modulators are reviewed， the advantages and disadvantages of various devices are summarized， and the future development of graphene in optoelectronic integration is also discussed.

The stress evolution and control of defect density of terahertz GaN Schottky barrier diode （SBD） epitaxy grown on 101.6 mm （4-inch） semi-insulating SiC substrate were studied by metal organic chemical vapor deposition （MOCVD）. A stress modulation scheme based on AlGaN transition layer was proposed， achieving stress well in control for GaN SBD epitaxy. Simultaneously， a pulse-doping process at a lower temperature was introduced into n+-GaN layer， which remarkably reduces density of defects and improves crystalline quality of GaN SBD epitaxy. The as-grown 101.6 mm GaN SBD epitaxy possesses a wafer bow/warp of -12/18 μm， fullwidth at halfmaximum （FWHM） of （002）/（102） peaks of 148/239 arcsec， sheet resistance of 9.2 Ω/□ with nonuniformity in wafer of 1.1%. Finally， a GaN SBD device is fabricated based on the own epitaxy， showing a cut-off frequency up to 1.12 THz.

Large-scale phased array systems are one of the core and key factors for the flexible application of terahertz wireless transmission technology. This article introduces the development bottleneck of large-scale terahertz phased array technology and the research progress. The paper focused on introducing the tile-type splicing solution， which interconnected 16 CMOS chips through gold wire bonding to form the largest-scale terahertz phased array transmitter with 64 elements （8×8）. Through the balanced direct current power supply network and the "forward radiation + back heat dissipation" architecture， good direct current supply and heat treatment was achieved to ensure working performance of array. The peak effective isotropic radiation power （EIRP） can reach 35 dBm， the local oscillator signal leakage suppression and the image frequency signal suppression are both greater than 35 dB， and the horizontal and vertical directions achieve ±60° beam coverage. This article also introduces the world's longest distance 52 m terahertz phased array real-time wireless communication link， and the system transmission rate can reach 1.6 Gbit/s.

The development of high power and high‑power density for GaN devices is limited by the synergism of self‑heating effect and heat dissipation capabilities in the near junction region， which leads to an increase in device junction temperature and a serious decline in device performance. As a result， the high‑power potential of GaN devices has not been fully realized. Diamond near‑junction integrated thermal management technology is an important way to solve the thermal bottleneck of GaN devices. The importance of near junction thermal management technology for GaN devices is dissipation in detail， the research progress of foreign advanced diamond near junction heat dissipation technology are analyzed and evaluated systemically in this paper. Meanwhile， the integrated process approach and technical challenges of the integration between diamond and near junctions of GaN devices are expounded， and the state and direction of diamond near junction integrated thermal management technology for GaN devices is also explained.

The single crystal diamond substrate was treated with hydrogen plasma by microwave plasma chemical vapor deposition （MPCVD） equipment， and the hole conductance on the surface of hydrogen‑terminated diamond was formed to prepare hydrogen‑terminated Schottky diodes. The diode used gold as the cathode metal and aluminum as the Schott group. Then the RF‑DC circuit was prepared by gold wire bonding technique. The diode shows good rectification characteristics， with a current size of 1.13 mA at a forward voltage of -5 V. The RF‑DC circuit uses a double diamond Schottky diode to ensure that the signal input can be maintained throughout the cycle. In the 10 MHz frequency band， the radio frequency voltage signal is successfully converted from 7 V AC to 1.97 V DC， and the conversion efficiency is 13.3%， which is consistent with the simulated results. The experimental results show that diamond Schottky diode is feasible for RF‑DC circuit.

Polycrystalline diamond heat sinks were prepared by microwave plasma chemical vapor deposition （MPCVD） under different processes， and their thermal conductivity， warpage， surface morphology， crystal orientation and Raman spectra were tested and analyzed. The results show that the growth rate and quality of diamond are greatly affected by methane concentration and growth temperature. Appropriately reducing methane concentration and increasing growth temperature are helpful to prepare high quality polycrystalline diamond heat sinks with low warpage and high thermal conductivity.

To fulfill the requirements for low noise and wide bandwidth in IEEE 802.11ax applications， a wideband low noise amplifier （LNA） operating at 5.3‑7.4 GHz was designed. By utilizing a passive transformer for noise cancellation， the noise figure is improved by 0.27 dB compared to non‑cancellation designs， without increasing power consumption. The device incorporated a switched capacitor array for a tunable inter‑stage network， providing 700 MHz sub‑band and 2.1 GHz overall tuning bandwidths. Additionally， a wideband output matching network was designed based on the constant‑Q circle strategy. Fabricated in 22 nm CMOS process， the chip testing results demonstrate a 3 dB bandwidth of 2.1 GHz and a peak gain of 26.5 dB. Furthermore， the noise figure remains below 2.53 dB， and the gain exceeds 23 dB across the entire 5.3 to 7.4 GHz spectrum， with a power consumption of 43 mW.

The excellent properties of graphene make it have broad application prospects in the field of semiconductors. At the same time， the special structure of its single atomic layer makes the number of graphene layers have a significant impact on its various characteristics. Therefore， the large-scale and stable preparation of graphene films with high quality and controllable layers is the basis for realizing its application in various key devices in the fields of microelectronics， optics and sensors. At present， among many graphene preparation methods， the most important method for preparing large-size and high-quality graphene films is chemical vapor deposition. In this paper， the research progress of pure single-layer graphene continuous films synthesized by chemical vapor deposition in recent years is reviewed. For the preparation of pure single-layer graphene films， the growth control mechanism and growth process of pure single-layer graphene are introduced from the perspectives of carbon source supply， growth atmosphere and substrate engineering. The crystal quality and layer uniformity of graphene grown by various methods are described. Finally， the development of this field is prospected.

Hydrogen-terminated diamond MOSFETs with Al₂O₃ gate dielectrics deposited at different temperatures by atomic layer deposition （ALD） technique have been fabricated on （001）-oriented single crystal diamond substrates. The device with gate dielectric deposited at 200℃ exhibited a saturation current density of 291 mA/mm. With the deposition temperature increased to 300℃， the saturation current density was significantly improved to 504 mA/mm， resulting in an increase of 73%. Additionally， by increasing the deposition temperature， the device demonstrated a lower on-resistance， a higher transconductance， as well as a larger threshold voltage， indicating the device has a higher carrier concentration. This phenomenon is primarily attributed to the presence of more negative charges in the Al₂O₃ deposited at 300℃. The small-signal characteristics of the two kinds of devices were investigated， and it was found that the cut-off frequency f_T and the maximum oscillation frequency f_max were also improved with the deposition temperature of ALD Al₂O₃ increased from 200℃ to 300℃. It implies that the current density and frequency performance of the diamond MOSFETs can be significantly improved by using the high temperature ALD Al₂O₃ deposition technique.

In this paper， a tripler working at 330-400 GHz was developed using the GaAs Schottky diode technology. In the triple frequency circuit， a passive reverse parallel balanced structure was achieved by setting the arrangement direction of diode cores perpendicular to the signal transmission direction. This structure can suppress even harmonics， enhance odd harmonics and improve the frequency doubling efficiency. To reduce packaging errors， the monolithic integration technology was used to integrate the Schottky diode and peripheral circuits on a 25 µm thick GaAs substrate， creating a chip. The chip was then packaged into the shielding cavity to form a waveguide-suspended microstrip line structure for a small circuit loss. The test results show that within the 330-400 GHz range， the output power of the tripler is greater than 5.5 dBm at the input power of 22 dBm， and the peak output power is better than 7 dBm.

Semiconducting single-walled carbon nanotubes （s-SWCNTs） have become a strong competitor for new semiconductor materials in the post-Moore era due to their excellent electrical properties such as high carrier mobility and ballistic transport. After more than 20 years of development， carbon-based electronic technology has made significant progress in material purification of s-SWCNTs， preparation of s-SWCNT-based field-effect transistors （CNT FETs）， and device physics based on CNT FETs. However， the chiral diversity of s-SWCNTs leads to fluctuations in the electrical properties of CNT FETs， which limits the application of s-SWCNTs in high-end integrated circuits （ICs） with advanced processes and excellent performance. Monochiral s-SWCNTs not only exhibit excellent electrical properties， but also have controllable structures and stable performance， which are crucial for their application in high-end ICs. However， there are still many challenges in improving the separation purity and yield of monochiral s-SWCNT， as well as optimizing monochiral CNT FETs. This article reviews the methods of chiral sorting of carbon nanotubes and focuses on the research progress of post-processing sorting for conjugated polymers. Then， the research progress of monochiral CNT FETs is introduced， and future development directions are summarized and analyzed. Finally， the application prospects of chiral-enriched s-SWCNTs include challenges and future opportunities.

In this paper， the signal integrity （SI） and power integrity （PI） problems for a typical vertical via interconnect structure in the signal path of a high-speed link in combination with surrounding power/ground plane pairs for power distribution network， were studied， and the mechanism of electromagnetic coupling was revealed. Thereupon， a co-analysis method with relatively succinct flow， low resource consumption and high modeling efficiency is proposed. Taking the design of signal path and power distribution network structure of a composite ceramic SiP sample as an example， the proposed co-analysis method and its effectiveness are studied and demonstrated.

In order to reduce the average power consumption of large area array CMOS image sensor chip， based on the working mechanism of switched capacitor amplifier， a method to reduce the power consumption of image sensor front-end signal acquisition and amplification module was proposed in this paper. The establishment characteristics of photoelectric signal of image sensor were studied， the dynamic relationship between signal stability and bias current was analyzed， and a dynamic low-power bias method aiming at efficient signal establishment was proposed. In view of the contradiction between power consumption and speed， an improvement method based on the preset voltage following the digital‑to‑analog converter（DAC） was proposed， which not only reduced power consumption， but also improved speed and accuracy. This method has been successfully applied to a 2 048×2 048 array scale CMOS image sensor with 3.3 V 55 nm CMOS process， and completed specific circuit design and backend physical implementation. The test results show that the output voltage establishment accuracy is 12 bit， the maximum output swing can reach 1.6 V， and the single-column power consumption is only 15.2 μW in the 500 frames/s high-speed application. At the same time， it can achieve 1‑4 times of programmable gain. Compared with the traditional method using the fixed bias circuit， the power consumption is reduced by 40%， which provides a theoretical basis for the design of high-speed， low-power and high-end CMOS image sensor with ultra large area array.

The demand for multi-functional integration in RF front-end chip design has imposed higher requirements on the functionality and reusability of transistor models. Nevertheless， traditional models fail to achieve multi-functional reusability， resulting in a multitude of parameter extraction steps and low modeling efficiency. In response， this paper presents a multi-functional device physics-based modeling approach based on the Quasi-physical zone division （QPZD） theory， which is capable of characterizing nonlinearity， noise， and switching characteristics. Firstly， the paper delineates the modeling principle of QPZD， introduces the modeling methods of nonlinearity， microwave noise， and switching characteristics based on QPZD， and proposes a multi-functional fusion method and an integrated model architecture based on a unified core model equation. Secondly， the modeling methods for dispersion effects， including self-heating effects， environmental temperature effects， and trapping effects， are presented. Finally， the model is validated from two perspectives： on-chip test verification of transistors and verification of multi-functional radio frequency （RF） front-end chip design. Simulation and measurement results indicate that the combined simulation accuracy of the model for nonlinearity， noise， and switching characteristics is greater than 80.33%. The modeling method proposed in this paper holds significant guiding significance for the comprehensive and precise designs of key RF front-end chip components.

The microstructure morphology of nano silver slurry before and after sintering was analyzed， and the effects of different sintering temperatures， sintering times， and heating rates on the shear strength of nano silver slurry sintered samples were studied. The effects of two different connecting materials， Au80Sn20 and nano silver slurry， on the heat dissipation performance of GaN chips were compared and analyzed. The results indicate that after sintering the GaN chip into the shell through nano silver slurry， there is a clear interdiffusion layer between the silver layer and the gold layer， achieving excellent interconnection between the chip and the shell. Under sintering conditions of 200℃， 90 min， and 5℃/min， the shear strength of the sample can reach 47.2 MPa. The temperature distribution of the chips assembled with nano silver slurry and Au80Sn20 is basically the same， but the heat dissipation performance of nano silver slurry is better than that of Au80Sn20. After undergoing temperature shock， vibration， temperature cycling， and RF aging tests， the thermal resistance of the chip sintered with nano silver paste did not fluctuate significantly， and the shear performance slightly improved.

Amorphous indium-gallium-zinc-oxide （IGZO） semiconductor channels were deposited used pulsed laser deposition technique and subsequently fabricated into high-performance back-gated field-effect transistors （FETs） employed micro-nanofabrication processes. The influence of deposition temperature， oxygen pressure， and post-annealing on the electrical characteristics of IGZO FETs was systematically investigated. The optimal deposition temperature is identified as 200℃. Moreover， as oxygen pressure increases， the threshold voltage of IGZO FETs exhibits a monotonic positive shift， reaching a threshold voltage greater than 0 V at an oxygen pressure of 15 Pa， transitioning the transistor from depletion-mode to enhancement-mode operation. Simultaneously， the on/off current ratio is boosted by 5 orders of magnitude， achieving 10⁷， and the extracted field-effect mobility is measured at 11.8 cm²/（V·s）. X-ray photoelectron spectroscopy （XPS） characterization indicates that the positive threshold voltage shift is primarily attributed to the increased oxygen pressure， reducing the oxygen vacancy concentration （carrier density） within the IGZO thin film. Furthermore， to further optimize the electrical properties of IGZO FETs， annealing at 250℃ in an Ar∶O₂ atmosphere for 2 hours is being performed. This treatment results in an enhancement of the device mobility to 16.1 cm²/（V·s） and a decrease in the contact resistance from 0.026 5 kΩ·mm to 0.003 kΩ·mm， while maintaining a consistent threshold voltage.

β‑Ga₂O₃ is a highly promising semiconductor material due to its ultra‑wide bandgap， high critical breakdown field， and excellent Baliga's figure of merit. In recent years， it has demonstrated significant application potential in fields such as power electronics and deep ultraviolet photodetection. Metal‑organic chemical vapor deposition （MOCVD） technology is an advantageous method for the industrialization of β‑Ga₂O₃， offering benefits such as high growth rates， precise control over film thickness， excellent film quality， and large‑scale growth capabilities. Consequently， it has been widely utilized in the epitaxial growth of β‑Ga₂O₃. This article reviews the research on MOCVD homoepitaxial growth of β‑Ga₂O₃ along various common crystal orientations and presents the current status of MOCVD epitaxial growth of the promising β‑（Al_xGa_1-x）₂O₃. Finally， it concludes with main challenges in MOCVD‑based growth of these two materials and offers an outlook for future developments.

In this paper， a high‑performance power amplifier operating in S‑band was designed by the 0.35 μm gate length and 60 V high voltage GaN HEMT process developed by Nanjing Electronic Devices Institute and the AlGaN/GaN scalable large signal model simulation guidance. The power amplifier was designed by a single GaN die with a total gate width of 36.4 mm using a hybrid integrated internal matching scheme. The drain voltage was 60 V and the frequency band was 2.7‑3.5 GHz. The test results show that the saturated output power of the power amplifier can reach up to 350 W， the power additional efficiency can reach up to 61% and the power gain is greater than 14.5 dB in the operating frequency band under the condition of pulse test with ambient temperature of 300 K， pulse width of 250 μs and duty cycle of 15%， which fully demonstrates the characteristics of GaN devices such as high working voltage， high power density and wide operating bandwidth.

When the diamond surface is treated by hydrogen plasma， an accumulation layer of two-dimensional hole gas （2DHG） will be formed with a density of about 10¹³ cm^-2. Therefore， field-effect transistors fabricated using hydrogen-terminated diamond （H-diamond） have become the focus of research. This paper is based on the outstanding physical properties of diamond and mainly discusses two formation mechanisms of H-diamond 2DHG， methods to stabilize 2DHG and improve device performance based on the depletion mode H-diamond MOSFET device structure， and three approaches to realize enhancement mode H-diamond MOSFET. Furthermore， the current research status， the challenges faced and prospects for future development are summarized.

Based on 0.15 μm GaAs pHEMT technology， a 6-bit high-precision numerical control phase shifter monolithic microwave integrated circuit with working frequency of 18 to 40 GHz was proposed. An improved phase shifter circuit with series and parallel capacitors was utilized in the 5.625°，11.25° and 22.5° phase bits， which could improve phase shifting accuracy by adding series inductors into the circuit. The magnetically coupled all-pass network was used in the 45° and 90° phase bit. In the 180° phase bit， a modified phase shifter based on the series and shunt resonators was employed to extend the bandwidth and achieve higher phase shifting precision. The fabricated chip occupied the size of 2.8 mm×1.4 mm. The measurement results demonstrate that the root mean square value of phase errors is less than 2.3°， and the RMS value of amplitude error is less than 0.7 dB within the operating frequency of 18 to 40 GHz. The insertion loss is less than 13.5 dB among all phase states. The input and output are better than 1.7 and 1.9 among all phase states， respectively.

By optimizing the metal structures and evaporation-annealing conditions， low contact resistivity and high stability p-GaN ohmic contact was achieved， and the diffusion behavior of electrode metals during the alloying process was analyzed. The test results demonstrate that the optimized ohmic contact to p-type GaN exhibits a contact resistance of 11.9 Ω·mm and a specific contact resistivity of 3.9×10^-5 Ω·cm². Furthermore， the contact characteristics do not degrade in high-temperature environments below 250℃. Based on these findings， an enhancement-mode p-channel GaN device was fabricated utilizing low-damage gate recess etching and dual-layer gate dielectric deposition techniques， yielding a threshold voltage of -1.2 V （V_GS=V_DS，I_DS=10 μA/mm）， a maximum drain current of -5.6 mA/mm， and an on-resistance of 665 Ω·mm （V_GS=-8 V，V_DS=-2 V）. This outstanding p-type ohmic contact technique establishes a crucial foundation for the development of high-performance GaN p-channel devices and contributes to the advancement of miniaturization， intelligence， and high-speed capabilities in GaN CMOS technology.

With the gradual small of the critical dimension of integrated circuits， the better resolution is being required. The development route of interconnect metals was systematically discussed in this paper. The principle of the corresponding wet electronic chemicals in cleaning and electroplating were discussed simply. The development path of photoresist and the principle of anti-reflection coating were described. Finally， the development direction of interconnect materials and the future requirements of wet electronic chemicals were summarized and prospected.

In order to solve the design requirements of miniaturization and lightweighting of the system， an integrated SiP transceiver module that supports BeiDou RNSS and RDSS was designed in this paper. The working frequency band supports the three frequency points of BeiDou B3/L/S. The SiP module adopted an integrated ceramic packaging architecture， and multiple RF passive devices and digital analog chips were integrated through heterogeneous and heterogeneous integration. The isolation shielding was realized by using metal cavity shielding and multi‑row cross metal through hole structure， and the passive devices such as filter， multiplexer， balun and transmission structure were simulated and designed. The final size is 24.0 mm×24.0 mm×4.3 mm， with good performance. The article introduces the working principle， key technologies， and final implementation form of the SiP transceiver module， and the design results meet the relevant application requirements of positioning and navigation terminals.

To solve the balance problem of high sensitivity and wide sensing range in pressure sensor， a pressure sensor based on polydimethylsiloxane （PDMS） conical microstructures with graphene was developed using a photoresist assisted masking technique， inspired by the photo-stamping technology. The influence of different cone sizes on the sensitivity of pressure sensor was also studied. The results show that the cone radius of 1.5 mm can effectively improve the sensitivity. The sensitivity of the dual-layer PDMS conical microstructure-based graphene pressure sensor ranges from 0.082 7 kPa^-1 at 0‑0.5 kPa to 0.2936 kPa^-1 at 0.5‑3.0 kPa. The sensitivity of the dual-layer cone structure being approximately 2.4 times that of the same material and structure. With a response time of 62.5 ms， a recovery time of 125 ms and excellent reproducibility， the double-layer PDMS conical pressure sensor is suitable for healthcare， wearable electronics， smart packaging and other fields.