On-chip Closed-loop Charge Pump Circuit for Anti-fuse FPGA

MA Jinlong, YU Zongguang, ZHAO Guilin, LIU Guozhu, ZHU Daiyin

RESEARCH & PROGRESS OF SOLID STATE ELECTRONICS ›› 2022, Vol. 42 ›› Issue (4) : 309-316.

PDF(2414 KB)
PDF(2414 KB)
RESEARCH & PROGRESS OF SOLID STATE ELECTRONICS ›› 2022, Vol. 42 ›› Issue (4) : 309-316.
Si Microelectronics

On-chip Closed-loop Charge Pump Circuit for Anti-fuse FPGA

    {{javascript:window.custom_author_en_index=0;}}
  • {{article.zuoZhe_EN}}
Author information +
History +

HeighLight

{{article.keyPoints_en}}

Abstract

{{article.zhaiyao_en}}

Key words

QR code of this article

Cite this article

EndNote

Ris (Procite)

Bibtex

Download Citations
{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2022, 42(4): 309-316

References

Publishing order | Descend order by publishing year | Descend order by cited within

References

{{article.reference}}

Funding

RIGHTS & PERMISSIONS

{{article.copyrightStatement_en}}
{{article.copyrightLicense_en}}
PDF(2414 KB)

Accesses

Citation

Detail
Sections
Recommended
Copyright © RESEARCH & PROGRESS OF SOLID STATE ELECTRONICS, All Rights Reserved.
Powered by Beijing Magtech Co. Ltd,.

/

〈 〉